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This commit is contained in:
RuigeLee
2024-10-29 17:32:17 +08:00
parent ff4508ec35
commit 332fcf010d
6 changed files with 253 additions and 79 deletions
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16
Makefile
View File

@@ -60,6 +60,8 @@ test:
sw:
riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-c ./tb/sw/src/mstStartup.S \
@@ -84,15 +86,21 @@ sw:
sed -i 's/@800/@000/g' ./tb/sw/build/mstTest.verilog
riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-c ./tb/sw/src/slvMain.c \
-o ./tb/sw/build/slvMain.o
riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-c ./tb/sw/src/slvStartup.S \
-o ./tb/sw/build/slvStartup.o
riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
-I ./tb/sw/ -I ./tb/sw/src \
-c ./tb/sw/src/slvMain.S \
-o ./tb/sw/build/slvMain.o
# riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \
# -I ./tb/sw/ -I ./tb/sw/src \
# -c ./tb/sw/src/slvMain.S \
# -o ./tb/sw/build/slvMain.o
riscv64-unknown-elf-gcc -Os -ggdb -march=rv32i -mabi=ilp32 -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles \
-T ./tb/sw/linker.lds \

8
src/main/scala/backBoard/pico/BackSystem.scala
View File

@@ -149,10 +149,10 @@ class BackSysImp(outer: BackSys) extends LazyModuleImp(outer) with HasBackParame
cdr(0).io.overCLK := io.overCLK
cdr(1).io.overCLK := io.overCLK
cdr(0).io.datIn := io.uDatIn
io.uDatOut := cdr(0).io.datOut
cdr(1).io.datIn := io.dDatIn
io.dDatOut := cdr(1).io.datOut
cdr(0).io.datIn := io.dDatIn
io.dDatOut := cdr(0).io.datOut
cdr(1).io.datIn := io.uDatIn
io.uDatOut := cdr(1).io.datOut
io.out := gpio.io.out

201
tb/sw/src/SlvMain.c Normal file
View File

@@ -0,0 +1,201 @@
#include <stdint.h>
// #include "uart.h"
// #include "gpio.h"
// #include "timer.h"
volatile uint32_t *cdr_0_tx_status = (uint32_t*)( 0x40000000 + 0x0 ); //read
volatile uint32_t *cdr_0_tx_txLen = (uint32_t*)( 0x40000000 + 0x4 ); //write
volatile uint32_t *cdr_0_tx_txFifo = (uint32_t*)( 0x40000000 + 0x8 ); //write
volatile uint32_t *cdr_0_rx_softReset = (uint32_t*)( 0x40000000 + 0x10 ); //write
volatile uint32_t *cdr_0_rx_status = (uint32_t*)( 0x40000000 + 0x14 ); //read
volatile uint32_t *cdr_0_rx_rxLen = (uint32_t*)( 0x40000000 + 0x18 ); //read
volatile uint32_t *cdr_0_rx_rxFifo = (uint32_t*)( 0x40000000 + 0x1c ); //read
volatile uint32_t *cdr_1_tx_status = (uint32_t*)( 0x40000080 + 0x0 ); //read
volatile uint32_t *cdr_1_tx_txLen = (uint32_t*)( 0x40000080 + 0x4 ); //write
volatile uint32_t *cdr_1_tx_txFifo = (uint32_t*)( 0x40000080 + 0x8 ); //write
volatile uint32_t *cdr_1_rx_softReset = (uint32_t*)( 0x40000080 + 0x10 ); //write
volatile uint32_t *cdr_1_rx_status = (uint32_t*)( 0x40000080 + 0x14 ); //read
volatile uint32_t *cdr_1_rx_rxLen = (uint32_t*)( 0x40000080 + 0x18 ); //read
volatile uint32_t *cdr_1_rx_rxFifo = (uint32_t*)( 0x40000080 + 0x1c ); //read
volatile uint32_t *WriteGpio = (uint32_t*) ( 0x60000000);
volatile uint32_t *ReadGpio = (uint32_t*) ( 0x60000000);
volatile uint32_t *ReadIsLast = (uint32_t*) ( 0x60000008);
static inline void error() {
while(1);
}
void main()
{
uint32_t readDat;
uint8_t operator;
uint16_t downRecvLen;
uint16_t upRecvLen;
uint8_t slvNum;
uint8_t totNum;
while(1){
asm volatile (
"1:\n"
"beqz sp, 1b\n"
"li ra, 1\n"
"sub sp, sp, ra\n"
);
readDat = *cdr_0_rx_rxFifo;
operator = (readDat >> 16) & 0xf;
downRecvLen = readDat >> 24;
asm volatile (
"1:\n"
"beqz sp, 1b\n"
"addi sp, sp, -1\n"
);
readDat = *cdr_0_rx_rxFifo;
if( operator == 0 ){
slvNum = 64 - ( downRecvLen >> 3 );
uint16_t localLen = 8;
uint16_t downSendLen = downRecvLen - 8;
//接收本地包
for( uint8_t i = 0; i < 8/4; i++ ){
asm volatile (
"1:\n"
"beqz sp, 1b\n"
"addi sp, sp, -1\n"
);
readDat = *cdr_0_rx_rxFifo;
}
// 下行包头
*cdr_0_tx_txLen = downRecvLen; //downSendLen + 8
*cdr_0_tx_txFifo = (downSendLen << 24) |( 0 << 16) | 0;
*cdr_0_tx_txFifo = 0;
//下行负载
for( uint16_t i = 0; i < (downSendLen >> 3); i++ ){ //一次传4byte
asm volatile (
"1:\n"
"beqz sp, 1b\n"
"addi sp, sp, -1\n"
);
*cdr_0_tx_txFifo = *cdr_0_rx_rxFifo; //接收即发送
}
//CRC
asm volatile (
"1:\n"
"beqz sp, 1b\n"
"addi sp, sp, -1\n"
);
uint32_t crc = *cdr_0_rx_rxFifo; //CRC
asm volatile ( //等待发送完成标志
"1:\n"
"andi ra, x4, 0x4\n"
"beqz x4, 1b\n"
);
asm volatile (
"beqz sp, 2f\n"
"1:"
"j 1b\n"
"2:\n"
);
//上行转发
//接收第一个包
asm volatile (
"1:\n"
"beqz sp, 1b\n"
"addi sp, sp, -1\n"
);
readDat = *cdr_1_rx_rxFifo;
operator = (readDat >> 16) & 0xf;
upRecvLen = readDat >> 24;
totNum = slvNum + (upRecvLen >> 3) - 1;
//接收第二个包
asm volatile (
"1:\n"
"beqz sp, 1b\n"
"addi sp, sp, -1\n"
);
readDat = *cdr_1_rx_rxFifo;
//发送上行包头
*cdr_1_tx_txLen = upRecvLen + 16; //downSendLen + 8
*cdr_1_tx_txFifo = ((upRecvLen + 8) << 24) |( 0 << 16) | 0;
*cdr_1_tx_txFifo = 0;
for( uint8_t i = 0; i < 8/4; i ++ ){
*cdr_1_tx_txFifo = 0;
}
for( uint16_t i = 0; i < upRecvLen >> 3; i ++ ){ //一次传4byte
asm volatile (
"1:\n"
"andi ra, x4, 0x40\n"
"beqz ra, 3f\n"
"2:\n"
"lui ra, %hi(0x40000000)\n"
"lw ra, 0x80(ra)\n"
"andi ra, ra, 0x20\n"
"bnez ra, 2b\n"
"3:\n"
"beqz sp, 1b\n"
"addi sp, sp, -1\n"
);
*cdr_1_tx_txFifo = *cdr_1_rx_rxFifo; //接收即发送
}
//CRC
asm volatile (
"1:\n"
"beqz sp, 1b\n"
"addi sp, sp, -1\n"
);
crc = *cdr_1_rx_rxFifo; //CRC
asm volatile (
"beqz sp, 2f\n"
"1:"
"j 1b\n"
"2:\n"
);
} else if ( operator == 1 ){
error();
} else if ( operator == 2 ){
error();
} else {
error();
}
}
}

65
tb/sw/src/main.c.bk
View File

@@ -1,65 +0,0 @@
#include <stdint.h>
// #include "uart.h"
// #include "gpio.h"
// #include "timer.h"
volatile uint32_t *cdr_0_tx_status = (uint32_t*)( 0x40000000 + 0x0 ); //read
volatile uint32_t *cdr_0_tx_txLen = (uint32_t*)( 0x40000000 + 0x4 ); //write
volatile uint32_t *cdr_0_tx_txFifo = (uint32_t*)( 0x40000000 + 0x8 ); //write
volatile uint32_t *cdr_0_rx_softReset = (uint32_t*)( 0x40000000 + 0x10 ); //write
volatile uint32_t *cdr_0_rx_status = (uint32_t*)( 0x40000000 + 0x14 ); //read
volatile uint32_t *cdr_0_rx_rxLen = (uint32_t*)( 0x40000000 + 0x18 ); //read
volatile uint32_t *cdr_0_rx_rxFifo = (uint32_t*)( 0x40000000 + 0x1c ); //read
volatile uint32_t *cdr_1_tx_status = (uint32_t*)( 0x40000080 + 0x0 ); //read
volatile uint32_t *cdr_1_tx_txLen = (uint32_t*)( 0x40000080 + 0x4 ); //write
volatile uint32_t *cdr_1_tx_txFifo = (uint32_t*)( 0x40000080 + 0x8 ); //write
volatile uint32_t *cdr_1_rx_softReset = (uint32_t*)( 0x40000080 + 0x10 ); //write
volatile uint32_t *cdr_1_rx_status = (uint32_t*)( 0x40000080 + 0x14 ); //read
volatile uint32_t *cdr_1_rx_rxLen = (uint32_t*)( 0x40000080 + 0x18 ); //read
volatile uint32_t *cdr_1_rx_rxFifo = (uint32_t*)( 0x40000080 + 0x1c ); //read
int main()
{
// uart_init();
// print_uart("Hello World, RocketChip is now Waking Up!\r\n");
// gpio_write( 0xfffffffa );
// for ( i = 0; i < 255; i++ )
// {
// *(txBuf+i) = data;
// data = data << 4 | data >> 60;
// }
// udelay(50);
*(cdr_0_tx_txLen) = 32*4;
for( uint8_t i = 0; i < 32; i ++ ){
while( (*cdr_0_tx_status & 0x1) );
*cdr_0_tx_txFifo = 32-i;
}
while(1)
{
;
}
return 0;
}
void handle_trap(void)
{
}

5
tb/sw/src/slvMain.S → tb/sw/src/slvMain.S.bk
View File

@@ -73,9 +73,10 @@ main:
j error # 未定义操作数，报错
opInit:
srli x6, x7, 3 #接收长度除以8
srli x6, x7, 3 # 接收长度除以8
sub x6, x0, x6 # x6=-x6
addi x6, x6, 64 x6=x6+64
addi x6, x6, 64 # x6=x6+64
li x2 # 接收计数器清零启动
opSync:

35
tb/sw/src/slvStartup.S
View File

@@ -9,11 +9,12 @@
_prog_start:
li x15, 0
li sp, 0
picorv32_maskirq_insn(zero, zero)
call main
li gp, 1;
ecall
@@ -26,8 +27,36 @@ trap_entry:
# q寄存器已经禁用， Without the q-registers, the irq return address will be stored in x3 (gp) and the IRQ bitmask in x4 (tp),
addi x15, x4, 0
# addi x15, x4, 0
# io.interrupt(0) := intTxError
# io.interrupt(1) := intTxFifoFull
# io.interrupt(2) := intTxFinish
# io.interrupt(3) := intRxError
# io.interrupt(4) := intRxValid
# io.interrupt(5) := intTxError
# io.interrupt(6) := intTxFifoFull
# io.interrupt(7) := intTxFinish
# io.interrupt(8) := intRxError
# io.interrupt(9) := intRxValid
# andi ra, x4, 0x02
# bnez ra, 1f
# addi, sp, sp, 2048
1:
andi ra, x4, 0x10
bnez ra, 2f
addi sp, sp, 1
2:
# andi ra, x4, 0x40
# bnez ra, 3f
# addi, sp, sp, 2048
3:
andi ra, x4, 0x200
bnez ra, 4f
addi sp, sp, 1
4:
picorv32_retirq_insn()