尝试流片顶层

This commit is contained in:
RuigeLee
2023-11-14 17:03:19 +08:00
parent b6767e5187
commit 31213302aa
5 changed files with 184 additions and 30 deletions

View File

@@ -25,15 +25,26 @@ object testModule extends App {
// ChiselGeneratorAnnotation(() => { new BackPlaneChainTest })
// ))
val cfg = new MacCfg
// val cfg = new MacCfg
(new chisel3.stage.ChiselStage).execute( Array("--show-registrations", "--full-stacktrace", "--target-dir", "generated/Main", "-e", "verilog") ++ args, Seq(
// (new chisel3.stage.ChiselStage).execute( Array("--show-registrations", "--full-stacktrace", "--target-dir", "generated/Main", "-e", "verilog") ++ args, Seq(
// ChiselGeneratorAnnotation(() => {
// val soc = LazyModule(new MacTest()(cfg))
// soc.module
// })
// ))
import Wrapeer._
val cfg = new EfConfig
(new chisel3.stage.ChiselStage).execute( Array("--show-registrations", "--full-stacktrace", "--target-dir", "generated/Main", "-E", "verilog") ++ args, Seq(
ChiselGeneratorAnnotation(() => {
val soc = LazyModule(new MacTest()(cfg))
val soc = LazyModule(new EfablessTop()(cfg))
soc.module
})
))
}