From 2c1627b215a540464e4a02ce0663b3377b927e02 Mon Sep 17 00:00:00 2001 From: bacon Date: Mon, 22 Sep 2025 00:58:34 +0800 Subject: [PATCH] =?UTF-8?q?=E4=BF=AE=E6=94=B9=E6=B5=8B=E8=AF=95=E7=94=A8?= =?UTF-8?q?=E4=BE=8B,SPI/QSPI=E7=9A=84=E6=B5=8B=E8=AF=95=E7=94=A8=E4=BE=8B?= =?UTF-8?q?=E5=BA=94=E8=AF=A5=E8=BF=87=E4=BA=86?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- tb/shinTest/Makefile_vcs | 3 +- tb/shinTest/ShinTopSpiTb.v | 10 +++---- tb/shinTest/gen_pkt.py | 11 ++++---- tb/shinTest/testcase/base.py | 18 ++++++------ tb/shinTest/testcase/environment.py | 43 +++++++++++++++++++++-------- tb/shinTest/testcase/rwregs.py | 2 +- tb/shinTest/testcase/sync.py | 10 +++---- 7 files changed, 60 insertions(+), 37 deletions(-) diff --git a/tb/shinTest/Makefile_vcs b/tb/shinTest/Makefile_vcs index df609fe..d1beb28 100644 --- a/tb/shinTest/Makefile_vcs +++ b/tb/shinTest/Makefile_vcs @@ -2,6 +2,7 @@ OUTPUT = shin_test CPU_COUNT := $(shell nproc) +SPI_TYPE ?= -spi 0 VCS = vcs -sverilog +v2k -timescale=1ns/1ps \ -full64 \ @@ -14,7 +15,7 @@ VCS = vcs -sverilog +v2k -timescale=1ns/1ps \ SIM = ./${OUTPUT} -l run.log testShin_vcs: - python3 ./shinTest/gen_pkt.py + python3 ./shinTest/gen_pkt.py ${SPI_TYPE} mkdir -p generated/log rm -rf generated/log/* @echo "Available CPUs: ${CPU_COUNT}" diff --git a/tb/shinTest/ShinTopSpiTb.v b/tb/shinTest/ShinTopSpiTb.v index 6ad0db6..40b93eb 100644 --- a/tb/shinTest/ShinTopSpiTb.v +++ b/tb/shinTest/ShinTopSpiTb.v @@ -849,21 +849,21 @@ always @(negedge io_int_sig[4]) begin end //`define USING_IQSPI -//`define USING_ESPI -//`define USING_EQSPI -`define USING_AQSPI +//`define USING_OSPI +//`define USING_OQSPI +//`define USING_AQSPI `ifdef USING_IQSPI `define INTERFACE_IDX 0//internal spi `define ARRAY_IDX_OFF 3 `endif -`ifdef USING_ESPI +`ifdef USING_OSPI `define INTERFACE_IDX (`ALL_DEV_NUM)//internal spi `define ARRAY_IDX_OFF 3 `endif -`ifdef USING_EQSPI +`ifdef USING_OQSPI `define INTERFACE_IDX (`ALL_DEV_NUM * 2)//internal spi `define ARRAY_IDX_OFF 3 `endif diff --git a/tb/shinTest/gen_pkt.py b/tb/shinTest/gen_pkt.py index 88c857a..4bb35cb 100755 --- a/tb/shinTest/gen_pkt.py +++ b/tb/shinTest/gen_pkt.py @@ -10,14 +10,15 @@ if __name__ == '__main__': # 可选参数 parser.add_argument("-8b10b", action="store_true", dest="use_8b10b", default=False, help="使用8b10b编码") - + parser.add_argument("-spi", dest="spi_type", type=int, default=0, help="选择SPI，0:ISPI;1:OSPI;2:OQSPI;3:AQSPI") # 解析参数 args = parser.parse_args() #if args.use_8b10b: # add_tc_2_runlist(rwregs.tc1()) - + #print(args.spi_type) environment.gen_slv_dev_num(4) + environment.set_spi_interface(args.spi_type) environment.set_using_8b10b(args.use_8b10b) environment.bringup() @@ -68,7 +69,7 @@ if __name__ == '__main__': add_tc_2_runlist(rwregs.tc3()) #''' - ''' + #''' add_tc_2_runlist(base.tc1()) add_tc_2_runlist(base.tc2()) add_tc_2_runlist(base.tc3()) @@ -76,11 +77,11 @@ if __name__ == '__main__': add_tc_2_runlist(base.tc5()) add_tc_2_runlist(base.tc6()) add_tc_2_runlist(base.tc7()) - ''' + #''' add_tc_2_runlist(base.tc8()) - ''' + #''' add_tc_2_runlist(base.tc9()) add_tc_2_runlist(base.tc10()) add_tc_2_runlist(base.tc11()) diff --git a/tb/shinTest/testcase/base.py b/tb/shinTest/testcase/base.py index 15ee6d8..a0afedc 100644 --- a/tb/shinTest/testcase/base.py +++ b/tb/shinTest/testcase/base.py @@ -510,8 +510,8 @@ def tc8(): +"\n#5000\n" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) +genIFRwDataCode(2, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(0) - +using_proper_transcode(2) + +using_proper_workmode(0) + +using_proper_workmode(2) +genMessageCode("--读取中断") +genIFRwDataCode(0, 0x74, False, 4) @@ -2120,8 +2120,8 @@ def tc28(): +"#5000" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(0) - +using_proper_transcode(4) + +using_proper_workmode(0) + +using_proper_workmode(4) +genMessageCode("--读取中断") +genIFRwDataCode(0, 0x74, False, 4) @@ -2336,8 +2336,8 @@ def tc28(): +"#5000" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(0) - +using_proper_transcode(4) + +using_proper_workmode(0) + +using_proper_workmode(4) +genMessageCode("--读取中断") +genIFRwDataCode(0, 0x74, False, 4) @@ -2627,7 +2627,7 @@ def tc31(): +genIFRwDataCode(4, 0x40, True, 4, [0x01, 0x00, 0x66, 0x79]) +"#5000" +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(4) + +using_proper_workmode(4) +genIFRwDataCode(4, 0x0, True, 1, [1, ]) +genIFRwDataCode(4, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) #+genEnableInsertTimeCode(0xa) @@ -2825,7 +2825,7 @@ def tc31(): +genIFRwDataCode(0, 0x40, True, 4, [0x01, 0x00, 0x66, 0x79]) +"#5000\n" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(0) + +using_proper_workmode(0) +genIFRwDataCode(0, 0x0, True, 1, [1, ]) +genIFRwDataCode(0, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) +genIFRwDataCode(0, 0x7c, True, 2, [0x10, 0x80]) @@ -3009,7 +3009,7 @@ def tc31(): +genIFRwDataCode(4, 0x40, True, 4, [0x01, 0x00, 0x66, 0x79]) +"#5000" +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(4) + +using_proper_workmode(4) +genIFRwDataCode(4, 0x00, True, 1, [2, ]) +genIFRwDataCode(4, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) ) diff --git a/tb/shinTest/testcase/environment.py b/tb/shinTest/testcase/environment.py index b82cf0a..1524c5e 100644 --- a/tb/shinTest/testcase/environment.py +++ b/tb/shinTest/testcase/environment.py @@ -4,6 +4,7 @@ from pyutils import * global_dev_num = 4 global_setting_dev_clk = dict() global_using_8b10b = False +global_spi_type = 0 def bringup(): gen_file_def = "sys_bringup" @@ -30,11 +31,11 @@ def bringup(): +genIFRwDataCode(3, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) +genIFRwDataCode(4, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) +genMessageCode("--设置合适的底层编码4b5b or 8b10b") - +using_proper_transcode(0) - +using_proper_transcode(1) - +using_proper_transcode(2) - +using_proper_transcode(3) - +using_proper_transcode(4) + +using_proper_workmode(0) + +using_proper_workmode(1) + +using_proper_workmode(2) + +using_proper_workmode(3) + +using_proper_workmode(4) ) main_dev = [0x01, ] @@ -265,11 +266,24 @@ def __GenDevice(id, TerminateNode = False): def __gen_slv_dev_predef(num): global global_setting_dev_clk + global global_spi_type + code_for_clk = "" for k in global_setting_dev_clk: code_for_clk = code_for_clk + "reg [15:0] multiCLK%d;\n"%(k, ) - - code_predef =("`define DEV_NUM %d //slave num\n"%(num, ) + + spi_type_str = "USING_IQSPI" + if global_spi_type == 1: + spi_type_str = "USING_OSPI" + elif global_spi_type == 2: + spi_type_str = "USING_OQSPI" + elif global_spi_type == 3: + spi_type_str = "USING_AQSPI" + else: + spi_type_str = "USING_IQSPI" + + code_predef =("`define %s\n"%(spi_type_str, ) + +"`define DEV_NUM %d //slave num\n"%(num, ) +"`define ALL_DEV_NUM (`DEV_NUM + 1) // slave + master\n" +"`define SPI_CSN_NUM (`ALL_DEV_NUM * 4)\n\n" @@ -427,16 +441,23 @@ def teardown(): #add_tc_2_runlist("") pass +def set_spi_interface(spi_type): + global global_spi_type + global_spi_type = spi_type def set_using_8b10b(isUsing8b10b): global global_using_8b10b global_using_8b10b = isUsing8b10b -def using_proper_transcode(dev): +def using_proper_workmode(dev): global global_using_8b10b + global global_spi_type + + trans_code = 0x0 + if global_using_8b10b: - return genIFRwDataCode(dev, 0x004c, True, 2, [0x1, 0x59], wlog = False) - else: - return genIFRwDataCode(dev, 0x004c, True, 2, [0x0, 0x59], wlog = False) + trans_code = 0x1 + + return genIFRwDataCode(dev, 0x004c, True, 2, [0x1, 0x59], wlog = False)+genIFRwDataCode(dev, 0x4e, True, 2, [global_spi_type, 0x60], wlog=False, iface=1) \ No newline at end of file diff --git a/tb/shinTest/testcase/rwregs.py b/tb/shinTest/testcase/rwregs.py index 5b8f95f..ab25ee2 100644 --- a/tb/shinTest/testcase/rwregs.py +++ b/tb/shinTest/testcase/rwregs.py @@ -58,7 +58,7 @@ def tc1(): default_trans_code = "" for i in range(dev_num + 1): - default_trans_code = default_trans_code + using_proper_transcode(i) + default_trans_code = default_trans_code + using_proper_workmode(i) genPkt.addAfterExc(genMessageCode("--正确的key") +change_8b10b_code1 diff --git a/tb/shinTest/testcase/sync.py b/tb/shinTest/testcase/sync.py index f0b659b..0f533b6 100644 --- a/tb/shinTest/testcase/sync.py +++ b/tb/shinTest/testcase/sync.py @@ -834,7 +834,7 @@ def tc5(): +genIFRwDataCode(3, 0xc0, False, 4) +genIFRwDataCode(4, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(4) + +using_proper_workmode(4) +genIFRwDataCode(4, 0x00, True, 1, [0x2, ]) +genIFRwDataCode(4, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) @@ -1338,7 +1338,7 @@ def tc7(): genPkt.addBeforeExc("\n#5000\n" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(0) + +using_proper_workmode(0) +genIFRwDataCode(0, 0x74, False, 4) #+genIFRwDataCode(0, 0x40, False, 4) @@ -1771,14 +1771,14 @@ def tc8(): genPkt.addBeforeExc("\n#5000\n" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(0) + +using_proper_workmode(0) +genIFRwDataCode(0, 0x74, False, 4) +genIFRwDataCode(0, 0x00, True, 1, [0x1, ]) +genIFRwDataCode(0, 0x78, True, 4, [0xff, 0xff, 0xff, 0xff]) +genIFRwDataCode(1, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(1) + +using_proper_workmode(1) +genIFRwDataCode(1, 0x74, False, 4) +genIFRwDataCode(1, 0x00, True, 1, [0x2, ]) @@ -1863,7 +1863,7 @@ def tc8(): genPkt.addBeforeExc("\n#5000\n" +genIFRwDataCode(0, 0x09, True, 1, [0, ], False, iface=1) - +using_proper_transcode(0) + +using_proper_workmode(0) +genIFRwDataCode(0, 0x74, False, 4) #+genIFRwDataCode(0, 0x40, False, 4)