diff --git a/Makefile b/Makefile index 4b44ffa..8ed082a 100644 --- a/Makefile +++ b/Makefile @@ -70,6 +70,7 @@ sw: $(RVCC) -ggdb $(MARCH) $(CFLAGS) -Wall -mcmodel=medany -mexplicit-relocs -mcmodel=medany -mexplicit-relocs \ -I ./tb/sw/ -I ./tb/sw/src \ + -I ./tb/sw/tl2cdr \ -c ./tb/sw/src/mstStartup.S \ -o ./tb/sw/build/mstStartup.o diff --git a/tb/sw/src/mstStartup.S b/tb/sw/src/mstStartup.S index 084413e..ad45596 100644 --- a/tb/sw/src/mstStartup.S +++ b/tb/sw/src/mstStartup.S @@ -1,16 +1,12 @@ - - +#include "tl2cdr.h" .extern main .extern plic_handle -.globl prog_start +.globl _prog_start .section .text.init _prog_start: - - - li x1, 0 li x2, 0 li x3, 0 @@ -43,7 +39,8 @@ _prog_start: li x30, 0 li x31, 0 - la t0, trap_entry + #la t0, trap_entry + la t0, opt_trap_entry csrw mtvec, t0 li t0, 1 << 11 csrw mie, t0 @@ -97,25 +94,16 @@ trap_entry: sw t5,120(sp) sw t6,124(sp) - - - csrr t0, mstatus # 读取 mstatus 寄存器 andi t0, t0, ~(1 << 3) # 清除 MIE 位 (全局中断禁用) csrw mstatus, t0 # 写回 mstatus 寄存器 - - call plic_handle csrr t0, mstatus ori t0, t0, 1<<3 csrw mstatus, t0 - - - - lw ra,4(sp) lw sp,8(sp) lw gp,12(sp) @@ -153,6 +141,154 @@ trap_entry: mret +#.macro define_const name, value +# .equ \name, \value +#.endm +## 使用宏定义常量 +#define_const CDR_INT_TXEND, 14 + + +.extern plic_claim +.extern flag_intTxEnd +.extern flag_intRxError +.extern flag_intRxStart +.extern flag_intRxEnd + +opt_trap_entry: + + addi sp,sp,-136 + + #sw ra,4(sp) + #sw sp,8(sp) + #sw gp,12(sp) + #sw tp,16(sp) + + sw t0,20(sp) + sw t1,24(sp) + #sw t2,28(sp) + sw s0,32(sp) + sw s1,36(sp) + + #sw a0,40(sp) + #sw a1,44(sp) + #sw a2,48(sp) + #sw a3,52(sp) + #sw a4,56(sp) + #sw a5,60(sp) + #sw a6,64(sp) + #sw a7,68(sp) + #sw s2,72(sp) + #sw s3,76(sp) + #sw s4,80(sp) + #sw s5,84(sp) + #sw s6,88(sp) + #sw s7,92(sp) + #sw s8,96(sp) + #sw s9,100(sp) + #sw s10,104(sp) + #sw s11,108(sp) + #sw t3,112(sp) + #sw t4,116(sp) + #sw t5,120(sp) + #sw t6,124(sp) + + csrr t0, mstatus # 读取 mstatus 寄存器 + andi t0, t0, ~(1 << 3) # 清除 MIE 位 (全局中断禁用) + csrw mstatus, t0 # 写回 mstatus 寄存器 + +# t0 = &plic_claim + lui t1, %hi(plic_claim) + lw t0, %lo(plic_claim)(t1) + +# t1 = *plic_claim + lw t1, 0(t0) + li s0, CDR_INT_TXEND + +#_if (t1 != s0) goto 1f + bne t1, s0, 1f + +#_else + lui s0,%hi(flag_intTxEnd) + li s1,1 + sw s1,%lo(flag_intTxEnd)(s0) + j 4f + +1: + li s0, CDR_INT_RXERROR +#_if (t1 != s0) goto 2f + bne t1, s0, 2f + +#_else + lui s0,%hi(flag_intRxError) + li s1,1 + sw s1,%lo(flag_intRxError)(s0) + j 4f +2: + li s0, CDR_INT_RXSTART +#_if (t1 != s0) goto 3f + bne t1, s0, 3f + +#_else + lui s0,%hi(flag_intRxStart) + li s1,1 + sw s1,%lo(flag_intRxStart)(s0) + j 4f + +3: + li s0, CDR_INT_RXEND + +#_if (t1 != s0) goto 4f + beq t1, s0, 4f + +#_else + lui s0,%hi(flag_intRxEnd) + li s1,1 + sw s1,%lo(flag_intRxEnd)(s0) + +4: + sw t1, 0(t0) + + csrr t0, mstatus + ori t0, t0, 1<<3 + csrw mstatus, t0 + + #lw ra,4(sp) + #lw sp,8(sp) + #lw gp,12(sp) + #lw tp,16(sp) + + lw t0,20(sp) + lw t1,24(sp) + #lw t2,28(sp) + lw s0,32(sp) + lw s1,36(sp) + + #lw a0,40(sp) + #lw a1,44(sp) + #lw a2,48(sp) + #lw a3,52(sp) + #lw a4,56(sp) + #lw a5,60(sp) + #lw a6,64(sp) + #lw a7,68(sp) + #lw s2,72(sp) + #lw s3,76(sp) + #lw s4,80(sp) + #lw s5,84(sp) + #lw s6,88(sp) + #lw s7,92(sp) + #lw s8,96(sp) + #lw s9,100(sp) + #lw s10,104(sp) + #lw s11,108(sp) + #lw t3,112(sp) + #lw t4,116(sp) + #lw t5,120(sp) + #lw t6,124(sp) + + addi sp,sp,136 + + mret diff --git a/tb/sw/src/slvStartup.S b/tb/sw/src/slvStartup.S index 1c0eb89..c44a152 100644 --- a/tb/sw/src/slvStartup.S +++ b/tb/sw/src/slvStartup.S @@ -3,7 +3,7 @@ .extern main .extern plic_handle -.globl prog_start +.globl _prog_start .section .text.init diff --git a/tb/sw/tl2cdr/tl2cdr.h b/tb/sw/tl2cdr/tl2cdr.h index 61c1959..5f1af6c 100644 --- a/tb/sw/tl2cdr/tl2cdr.h +++ b/tb/sw/tl2cdr/tl2cdr.h @@ -1,7 +1,9 @@ #ifndef _TL2CDR_H_ #define _TL2CDR_H_ +#ifndef __ASSEMBLER__ #include +#endif #define TL2CDR_BASE 0x10000000U @@ -32,7 +34,7 @@ #define CDR_INT_RXSTART 16 #define CDR_INT_RXEND 17 - +#ifndef __ASSEMBLER__ extern volatile uint32_t *cdr_status = (uint32_t*)( TL2CDR_BASE + CDR_ReadStatus ); //read extern volatile uint32_t *cdr_txLen = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxLen ); //write extern volatile uint32_t *cdr_txFifo = (uint32_t*)( TL2CDR_BASE + CDR_WriteTxFifo ); //write @@ -45,5 +47,6 @@ extern volatile uint32_t *cdr_IsLast = (uint32_t*)( TL2CDR_BASE + CDR_ReadIsL // extern uint32_t gpio_write( uint32_t data ); // void gpio_test(); +#endif #endif