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尝试加入cdr模块，主站上行rsp， tlast还有亚稳态

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This commit is contained in:
Ruige Lee
2025-05-06 17:39:52 +08:00
parent 9d53e4ea82
commit 19f4140dec
5 changed files with 197 additions and 267 deletions
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51
src/main/scala/backBoard/shin/SlaveParser.scala
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@@ -57,17 +57,14 @@ abstract class SlaveParserBase extends Module{
val FRAME_STYLE_COMMON = 0.U
val FRAME_STYLE_PROBE = 1.U
val STATE_IDLE = 0.U //空闲
val STATE_HEADER = 1.U //长度/ /保留2bits //包类型
val STATE_PAYLOAD_INDEX_STYLE = 2.U //子报文设备索引 //子报文类型
val STATE_PAYLOAD_ADDR = 3.U //子报文地址
val STATE_PAYLOAD_OP_LENGTH = 4.U //子报文命令类型 //子报文长度
val STATE_PAYLOAD_WORKCNT = 5.U //子报文工作计数
val STATE_PAYLOAD_DATA = 6.U //子报文数据
val STATE_CRC = 7.U //CRC校验
val STATE_ERROR = 8.U //
val STATE_WAIT = 9.U
val STATE_SUBMSG_HEADER = 2.U //子报文头
val STATE_PAYLOAD_DATA = 3.U //子报文数据
val STATE_CRC = 4.U //CRC校验
val STATE_ERROR = 5.U //
val STATE_WAIT = 6.U
@@ -463,7 +460,7 @@ trait SlaveParserRW{ this: SlaveParserBase =>
val addrr = Reg(UInt(15.W))
val readSMAddr = Mux1H(Seq(
( upRecParser.io.stateCurr === STATE_PAYLOAD_WORKCNT ) -> upRecParser.io.subMsgReq.bits.address,
( upRecParser.io.stateCurr === STATE_SUBMSG_HEADER ) -> upRecParser.io.subMsgReq.bits.address,
( upRecParser.io.stateCurr === STATE_PAYLOAD_DATA ) -> addrr,
))
@@ -631,14 +628,14 @@ trait SlaveParserProbe{ this: SlaveParserBase =>
val isReadyToProbe_Pending = RegInit(false.B)
when( downRecParser.io.frameReq.fire & downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){ //下行来了一个嗅探包
isReadyToProbe := true.B
isReadyToProbe_Pending := true.B
} .elsewhen( upRecParser.io.frameReq.fire & upRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){ //上行来了一个嗅探包
isReadyToProbe := false.B
isReadyToProbe_Pending := false.B
} .elsewhen( isWatchDogOverflow ){
isReadyToProbe := false.B
isReadyToProbe_Pending := false.B
}
when( downRecParser.io.frameReq.fire & downRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){ //下行来了一个嗅探包
@@ -649,16 +646,22 @@ trait SlaveParserProbe{ this: SlaveParserBase =>
val isLastDevice_Pending = RegInit(true.B)
when( upRecParser.io.frameReq.fire & upRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){ //上行来了一个嗅探包
isLastDevice_Pending := false.B
} .elsewhen( isWatchDogOverflow ){
isLastDevice_Pending := true.B
}
when( upRecParser.io.frameReq.fire & upRecParser.io.frameReq.bits.frameStyle === FRAME_STYLE_PROBE ){ //上行来了一个嗅探包
probeRecCnt := 0.U
isLastDevice := false.B
} .elsewhen( isWatchDogOverflow ){
probeRecCnt := 0.U
isLastDevice := true.B
} .elsewhen( isReadyToProbe ){
probeRecCnt := probeRecCnt + 1.U
}
@@ -672,10 +675,14 @@ trait SlaveParserProbe{ this: SlaveParserBase =>
io.upOut <> Queue( upSendGen.io.send, 1, true, true )
io.upOut <> Queue( upSendGen.io.send, 16, true, false )
io.downIn <> downRecParser.io.rec
val tmpFifo = Queue( downSendGen.io.send, 1, true, true )
val tmpFifo = Queue( downSendGen.io.send, 16, true, false )
when( isLastDevice & ~isReadyToProbe ){ //最后一个设备且不是探测模式
upRecParser.io.rec <> tmpFifo //axis短接
@@ -690,6 +697,14 @@ trait SlaveParserProbe{ this: SlaveParserBase =>
io.upIn <> upRecParser.io.rec
}
when( isLastDevice =/= isLastDevice_Pending & ~downSendGen.io.send.valid & ~tmpFifo.valid & ~io.upIn.valid ){
isLastDevice := isLastDevice_Pending
}
when( isReadyToProbe =/= isReadyToProbe_Pending & ~downSendGen.io.send.valid & ~tmpFifo.valid & ~io.upIn.valid ){
isReadyToProbe := isReadyToProbe_Pending
}
}
class SlaveParser extends SlaveParserBase