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增加测试代码

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This commit is contained in:
bacon
2025-09-02 09:21:25 +08:00
parent fd1f0d1536
commit 10e0cd645c
3 changed files with 49 additions and 48 deletions
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94
tb/shinTest/ShinTopSpiTb.v
View File

@@ -384,17 +384,15 @@ initial begin
spi_csn = {`SPI_CSN_NUM{1'b1}}; //~15'b0; spi_csn = {`SPI_CSN_NUM{1'b1}}; //~15'b0;
//#125000 #10000000
#1250000
reset <= 1; reset <= 1;
//#300000 #24000000
#3000000
reset <= 0; reset <= 0;
#1000000000000 #8000000000000
#1000000000000 #8000000000000
#1000000000000 #8000000000000
$display("Time Out !!!"); $display("Time Out !!!");
$fclose(spidata_file); $fclose(spidata_file);
@@ -402,7 +400,7 @@ initial begin
end end
initial begin initial begin
forever begin #1000000 clock <= ~clock; end forever begin #8000000 clock <= ~clock; end
end end
@@ -411,32 +409,36 @@ generate
initial begin initial begin
multiCLK[i] = 0; multiCLK[i] = 0;
for( integer j = 0; j < i; j = j + 1 ) begin for( integer j = 0; j < i; j = j + 1 ) begin
#125000 #1000000
; ;
end end
forever begin #1000000 multiCLK[i] <= ~multiCLK[i]; end forever begin #8000000 multiCLK[i] <= ~multiCLK[i]; end
end end
end end
endgenerate endgenerate
//如果频率差到 80ppm，参数是： 1000080/125010/1000080 [pass] //如果频率差到 80ppm，参数是： 8000640/1000080/8000640 [pass]
//如果频率差到120ppm，参数是： 1000120/125015/1000160 [pass] //如果频率差到120ppm，参数是： 8000960/1000120/8000960 [pass]
//如果频率差到160ppm，参数是： 1000160/125020/1000160 [pass] //如果频率差到160ppm，参数是： 8001280/1000160/8001280 [pass]
//如果频率差到168ppm，参数是： 1000168/125021/1000168 [pass] //如果频率差到168ppm，参数是： 8001344/1000168/8001344 [pass]
//如果频率差到176ppm，参数是： 1000176/125022/1000176 [pass] //如果频率差到176ppm，参数是： 8001408/1000176/8001408 [pass]
//如果频率差到-176ppm，参数是： 999824/124978/ 999824 [pass] //如果频率差到-176ppm，参数是： 7998592/ 999824/7998592 [pass]
//如果频率差到184ppm，参数是： 1000184/125023/1000184 [failed] //差得字节数不多，大概在180ppm上下 //如果频率差到180ppm，参数是： 8001440/1000180/8001440 [pass]
//如果频率差到-184ppm，参数是： 999816/124977/ 999816 //如果频率差到-180ppm，参数是： 7998560/ 999820/7998560 [pass]
//如果频率差到192ppm，参数是： 1000192/125024/1000192 //如果频率差到181ppm，参数是： 8001448/1000181/8001448 [failed] //tc29, tc30联合测试,tc30最后几个字节不过, 单测能过
//如果频率差到-192ppm，参数是： 999808/124976/ 999808 //如果频率差到-181ppm，参数是： 7998552/ 999819/7998552 [failed] //同上
//如果频率差到182ppm，参数是： 8001456/1000182/8001456 [failed]
//如果频率差到-182ppm，参数是： 7998544/ 999818/7998544 [failed] //单测, tc30下行是对的,上行发生错误
//如果频率差到184ppm，参数是： 8001472/1000184/8001472 [failed] //差得字节数不多，大概在180ppm上下
//如果频率差到-184ppm，参数是： 7998528/ 999816/7998528 [failed]
//如果频率差到200ppm，参数是： 1000200/125025/1000200
//如果频率差到-200ppm，参数是： 999800/124975/ 999800
initial begin initial begin
forever begin #1000184 clock2 <= ~clock2; end forever begin #7998560 clock2 <= ~clock2; end
end end
generate generate
@@ -444,10 +446,10 @@ generate
initial begin initial begin
multiCLK2[i] = 0; multiCLK2[i] = 0;
for( integer j = 0; j < i; j = j + 1 ) begin for( integer j = 0; j < i; j = j + 1 ) begin
#125023 #999820
; ;
end end
forever begin #1000184 multiCLK2[i] <= ~multiCLK2[i]; end forever begin #7998560 multiCLK2[i] <= ~multiCLK2[i]; end
end end
end end
endgenerate endgenerate
@@ -470,7 +472,7 @@ always @(negedge reset) begin
_reset_deactive <= 1'b1; _reset_deactive <= 1'b1;
end end
`define SCKFRE #8000000 `define SCKFRE #64000000
reg sck = 0; reg sck = 0;
@@ -545,13 +547,13 @@ end
always @(posedge clock) begin always @(posedge clock) begin
if( isReq & sck == 0 ) begin if( isReq & sck == 0 ) begin
isBusy <= #62500 1'b1; isBusy <= #500000 1'b1;
transCnt <= #62500 0; transCnt <= #500000 0;
byteCnt <= #62500 ~12'b0; byteCnt <= #500000 ~12'b0;
bitCnt <= #62500 ~3'b0; bitCnt <= #500000 ~3'b0;
spi_csn[idx] <= #62500 1'b0; spi_csn[idx] <= #500000 1'b0;
exChangeRego <= txBuf[0]; exChangeRego <= txBuf[0];
end end
end end
@@ -598,8 +600,8 @@ always @(posedge sck) begin
exChangeRegi <= isQspi ? {exChangeRegi[3:0], qspi_mux_miso} : {exChangeRegi[6:0], spi_mux_miso}; exChangeRegi <= isQspi ? {exChangeRegi[3:0], qspi_mux_miso} : {exChangeRegi[6:0], spi_mux_miso};
end end
end else begin end else begin
isBusy <= #62500 1'b0; isBusy <= #500000 1'b0;
spi_csn[idx] <= #62500 1'b1; spi_csn[idx] <= #500000 1'b1;
end end
end end
end end
@@ -618,13 +620,13 @@ task spi_trans( input [15:0] saddress, input [7:0] scmd, input [12:0] slength,in
length <= slength + 3; length <= slength + 3;
idx <= sidx; idx <= sidx;
#62500 #500000
@(negedge sck) @(negedge sck)
isReq <= 1; isReq <= 1;
@(posedge sck) #62500 @(posedge sck) #500000
isReq <= 0; isReq <= 0;
@( negedge isBusy) #12500000 @( negedge isBusy) #100000000
begin begin
//$fwrite(spidata_file, "------------%5t------------\n", $realtime); //$fwrite(spidata_file, "------------%5t------------\n", $realtime);
$fwrite(spidata_file, "T:%t \tdev:%4d, addr:0x%02h%02h, %s, len:%4d\n", $fwrite(spidata_file, "T:%t \tdev:%4d, addr:0x%02h%02h, %s, len:%4d\n",
@@ -902,13 +904,13 @@ task wait_comm_finished();
length = 8'h07; length = 8'h07;
idx = `IF_IQSPI(0); idx = `IF_IQSPI(0);
#62500 #500000
@(negedge sck) @(negedge sck)
isReq <= 1; isReq <= 1;
@(posedge sck) #62500 @(posedge sck) #500000
isReq <= 0; isReq <= 0;
@( negedge isBusy) #12500000 @( negedge isBusy) #100000000
begin begin
end end
@@ -922,17 +924,17 @@ task wait_comm_finished();
length = 8'h07; length = 8'h07;
idx = `IF_IQSPI(0); idx = `IF_IQSPI(0);
#62500 #500000
@(negedge sck) @(negedge sck)
isReq <= 1; isReq <= 1;
@(posedge sck) #62500 @(posedge sck) #500000
isReq <= 0; isReq <= 0;
@( negedge isBusy) #12500000 @( negedge isBusy) #100000000
begin begin
end end
#12500000 #100000000
//$display("%x %x", rxBuf[3], rxBuf[6]); //$display("%x %x", rxBuf[3], rxBuf[6]);
if ((rxBuf[3] & 8'h02) == 8'h02) if ((rxBuf[3] & 8'h02) == 8'h02)
begin begin
@@ -943,7 +945,7 @@ task wait_comm_finished();
$display("error occur"); $display("error occur");
is_run = 0; is_run = 0;
end end
if (($realtime - st) >= 62500000000.0) if (($realtime - st) >= 500000000000.0)
begin begin
$display("comm timeout."); $display("comm timeout.");
is_run = 0; is_run = 0;
@@ -955,7 +957,7 @@ endtask
initial begin initial begin
#6250000 #50000000
`ifdef ENABLE_REG_RW1_TEST `ifdef ENABLE_REG_RW1_TEST
/*--------------------------------------------------------------------------------------------------------- /*---------------------------------------------------------------------------------------------------------
@@ -1108,7 +1110,7 @@ initial begin
`include "tc_runlist.vh" `include "tc_runlist.vh"
#12500000000 #100000000000
$display("Testcase Finished! Time Out !!!"); $display("Testcase Finished! Time Out !!!");
$fclose(spidata_file); $fclose(spidata_file);
$stop; $stop;

2
tb/shinTest/gen_pkt.py
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@@ -40,7 +40,7 @@ if __name__ == '__main__':
#add_tc_2_runlist(base.tc24()) #add_tc_2_runlist(base.tc24())
#add_tc_2_runlist(base.tc25()) #add_tc_2_runlist(base.tc25())
#add_tc_2_runlist(base.tc26()) #add_tc_2_runlist(base.tc26())
#add_tc_2_runlist(base.tc29()) add_tc_2_runlist(base.tc29())
add_tc_2_runlist(base.tc30()) add_tc_2_runlist(base.tc30())

1
tb/shinTest/pyutils/GenPkt.py
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@@ -383,7 +383,6 @@ def genTcStartFrameCode(tcname, des):
code_str = f'''\tbegin:{upper_name}_TESTCASE\n'''\ code_str = f'''\tbegin:{upper_name}_TESTCASE\n'''\
+f'''\t\t`BEGIN_TESTCASE("{__pre_gen_log_path}/{tcname}_result.log");\n'''\ +f'''\t\t`BEGIN_TESTCASE("{__pre_gen_log_path}/{tcname}_result.log");\n'''\
+'''\t\t_t_start = $realtime;\n'''\ +'''\t\t_t_start = $realtime;\n'''\
+'''\t\t#1000\n'''\
+f'''\t\t$fdisplay(spidata_file,"\\n\\n测试用例：{upper_name}");\n''' +f'''\t\t$fdisplay(spidata_file,"\\n\\n测试用例：{upper_name}");\n'''
if len(des) > 0: if len(des) > 0: