bug 调整主站SM的错误控制，增加断言约束sm fifo行为

src/main/scala/backBoard/shin/MasterParser.scala

@@ -150,8 +150,8 @@ abstract class MasterParserBase extends Module{
 
 
 
-  io.rxEnq := io.downOut.fire & io.downOut.bits.tlast
+  io.rxEnq := io.upIn.fire    & io.upIn.bits.tlast
-  io.txDeq := io.upIn.fire    & io.upIn.bits.tlast
+  io.txDeq := io.downOut.fire & io.downOut.bits.tlast
 
 
 

src/main/scala/backBoard/shin/SMUnit.scala

@@ -50,10 +50,12 @@ abstract class SMUnitBase(depth: Int = 4) extends Module {
 
   when( io.enq ){
     wPtr := wPtr + 1.U
+    assert( ~isFull)
   }
 
   when( io.deq ){
     rPtr := rPtr + 1.U
+    assert( ~isEmpty )
   }
 
   for( i <- 0 until depth ){