From 035109bee16892a6439c7a383b7fa05926912141 Mon Sep 17 00:00:00 2001
From: Ruige Lee <wut.ruigeli@gmail.com>
Date: Wed, 13 Aug 2025 17:54:50 +0800
Subject: [PATCH] =?UTF-8?q?Revert=20"=E6=94=B96=E7=9B=B8=E4=BD=8D=EF=BC=8C?=
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This reverts commit 495a238a2650aac526ae5d25a6a3a4298d8e5c81.
---
 src/main/scala/backBoard/ebus/CDRIn.scala   | 12 ++++++------
 src/main/scala/backBoard/shin/ShinTop.scala |  2 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/main/scala/backBoard/ebus/CDRIn.scala b/src/main/scala/backBoard/ebus/CDRIn.scala
index 625389a..6290a81 100644
--- a/src/main/scala/backBoard/ebus/CDRIn.scala
+++ b/src/main/scala/backBoard/ebus/CDRIn.scala
@@ -70,21 +70,21 @@ trait CDRInMultiSample{ this: CDRInBase =>
 
 
   //multiCLK 需要按照滞后相位接线，即0为最先到达，1次先
-  val multiCLK = IO(Input(Vec(6, Bool())))
+  val multiCLK = IO(Input(Vec(16, Bool())))
 
 
-  val sampleReg = Wire(Vec(9, Bool()))
+  val sampleReg = Wire(Vec(23, Bool()))
   
-  for( i <- 0 until 6 ) {
+  for( i <- 0 until 16 ) {
     sampleReg(i) := withClockAndReset(multiCLK(i).asClock, reset.asBool){ ShiftRegister( io.serDat, 2 ) }
   }
-  for( i <- 6 until 9 ){
-    sampleReg(i) := withClockAndReset(multiCLK(i-3).asClock, reset.asBool){ RegNext(sampleReg(i-3))}
+  for( i <- 16 until 23 ){
+    sampleReg(i) := withClockAndReset(multiCLK(i-8).asClock, reset.asBool){ RegNext(sampleReg(i-8))}
   }
 
 
 
-  val asyncSerDat = PopCount(sampleReg) >= 5.U
+  val asyncSerDat = PopCount(sampleReg) >= 12.U
 
 
     // sampleReg.count( (x: Bool) => (x === true.B) ) >= 12.U
diff --git a/src/main/scala/backBoard/shin/ShinTop.scala b/src/main/scala/backBoard/shin/ShinTop.scala
index a482e1c..f8aa6ad 100644
--- a/src/main/scala/backBoard/shin/ShinTop.scala
+++ b/src/main/scala/backBoard/shin/ShinTop.scala
@@ -11,7 +11,7 @@ class ShinTopIO extends Bundle{
   val uDatIn   = Input(Bool())
   val uDatOut  = Output(Bool())
 
-  val multiCLK = Input(Vec(6, Bool()))
+  val multiCLK = Input(Vec(16, Bool()))
 
   val iqspi = new QSPIInterfaceIO
   val ospi = new SSPIInterfaceIO