测试读写

src/main/scala/backBoard/shin/SlaveParser.scala

@@ -369,13 +369,13 @@ trait SlaveParserRW{ this: SlaveParserBase =>
   when( downRecParser.io.subMsgReq.fire ){
     when( isDownRecPing ){
       //override
-      when( downRecParser.io.subMsgReq.bits.devIndex === localDevIndex & ( (downRecParser.io.subMsgReq.bits.operator === 1.U) | (downRecParser.io.subMsgReq.bits.operator === 3.U) ) ) { //自身包//写操作或读写操作)
+      when( downRecParser.io.subMsgReq.bits.devIndex === localDevIndex & ( (downRecParser.io.subMsgReq.bits.operator === 1.U) | (downRecParser.io.subMsgReq.bits.operator === 2.U) ) ) { //自身包//写操作或读写操作)
         downSubMsgInfo(0).workCnt  := downRecParser.io.subMsgReq.bits.workCnt + 1.U
       }
 
     } .otherwise{ //pong
       //override
-      when( downRecParser.io.subMsgReq.bits.devIndex === localDevIndex & ( (downRecParser.io.subMsgReq.bits.operator === 1.U) | (downRecParser.io.subMsgReq.bits.operator === 3.U) )) { //自身包//写操作或读写操作 )
+      when( downRecParser.io.subMsgReq.bits.devIndex === localDevIndex & ( (downRecParser.io.subMsgReq.bits.operator === 1.U) | (downRecParser.io.subMsgReq.bits.operator === 2.U) )) { //自身包//写操作或读写操作 )
         downSubMsgInfo(1).workCnt := downRecParser.io.subMsgReq.bits.workCnt + 1.U
       }
     }
@@ -395,8 +395,8 @@ trait SlaveParserRW{ this: SlaveParserBase =>
 
 
   val isWrite = (downRecParser.io.stateCurr === STATE_PAYLOAD_DATA) & ( //req fire 后 已经反相
-    ( ~isDownRecPing & (downSubMsgInfo(0).devIndex === localDevIndex) & ( (downSubMsgInfo(0).operator === 1.U) | (downSubMsgInfo(0).operator === 3.U) )) |
+    ( ~isDownRecPing & (downSubMsgInfo(0).devIndex === localDevIndex) & ( (downSubMsgInfo(0).operator === 1.U) | (downSubMsgInfo(0).operator === 2.U) )) |
-    (  isDownRecPing & (downSubMsgInfo(1).devIndex === localDevIndex) & ( (downSubMsgInfo(1).operator === 1.U) | (downSubMsgInfo(1).operator === 3.U) ))
+    (  isDownRecPing & (downSubMsgInfo(1).devIndex === localDevIndex) & ( (downSubMsgInfo(1).operator === 1.U) | (downSubMsgInfo(1).operator === 2.U) ))
   )
 
   when( downRecParser.io.subMsgReq.fire & downRecParser.io.subMsgReq.bits.devIndex === localDevIndex ){
@@ -436,12 +436,12 @@ trait SlaveParserRW{ this: SlaveParserBase =>
   when( upRecParser.io.subMsgReq.fire ){
     when( isUpRecPing ){
       //override
-      when( upRecParser.io.subMsgReq.bits.devIndex === localDevIndex & ( (upRecParser.io.subMsgReq.bits.operator === 2.U) || (upRecParser.io.subMsgReq.bits.operator === 3.U) ) ){ //自身包//读或读写
+      when( upRecParser.io.subMsgReq.bits.devIndex === localDevIndex & ( (upRecParser.io.subMsgReq.bits.operator === 0.U) || (upRecParser.io.subMsgReq.bits.operator === 2.U) ) ){ //自身包//读或读写
         upSubMsgInfo(0).workCnt  := upRecParser.io.subMsgReq.bits.workCnt + 1.U
       }
     } .otherwise{
       //override
-      when( upRecParser.io.subMsgReq.bits.devIndex === localDevIndex & ( (upRecParser.io.subMsgReq.bits.operator === 2.U) || (upRecParser.io.subMsgReq.bits.operator === 3.U) )){ //自身包//读或读写 )
+      when( upRecParser.io.subMsgReq.bits.devIndex === localDevIndex & ( (upRecParser.io.subMsgReq.bits.operator === 0.U) || (upRecParser.io.subMsgReq.bits.operator === 2.U) )){ //自身包//读或读写 )
         upSubMsgInfo(1).workCnt  := upRecParser.io.subMsgReq.bits.workCnt + 1.U
       }
     }
@@ -455,10 +455,10 @@ trait SlaveParserRW{ this: SlaveParserBase =>
   //读出uSM  
   val isRead = 
     ((upRecParser.io.stateCurr === STATE_PAYLOAD_DATA) & (
-      (~isUpRecPing & upSubMsgInfo(0).devIndex === localDevIndex & (upSubMsgInfo(0).operator === 2.U | upSubMsgInfo(0).operator === 3.U)) |
+      (~isUpRecPing & upSubMsgInfo(0).devIndex === localDevIndex & (upSubMsgInfo(0).operator === 0.U | upSubMsgInfo(0).operator === 2.U)) |
-      ( isUpRecPing & upSubMsgInfo(1).devIndex === localDevIndex & (upSubMsgInfo(1).operator === 2.U | upSubMsgInfo(1).operator === 3.U))
+      ( isUpRecPing & upSubMsgInfo(1).devIndex === localDevIndex & (upSubMsgInfo(1).operator === 0.U | upSubMsgInfo(1).operator === 2.U))
     ) |
-    ((upRecParser.io.stateNext === STATE_PAYLOAD_DATA) & (upRecParser.io.subMsgReq.bits.devIndex === localDevIndex) & (upRecParser.io.subMsgReq.bits.operator === 2.U | upRecParser.io.subMsgReq.bits.operator === 3.U))
+    ((upRecParser.io.stateNext === STATE_PAYLOAD_DATA) & (upRecParser.io.subMsgReq.bits.devIndex === localDevIndex) & (upRecParser.io.subMsgReq.bits.operator === 0.U | upRecParser.io.subMsgReq.bits.operator === 2.U))
   )
 
   val addrr = Reg(UInt(15.W))  
@@ -490,7 +490,7 @@ trait SlaveParserRW{ this: SlaveParserBase =>
   when( ~isUpRecPing ){ //req fire 后 已经反相
     upRecFifo(0).io.enq.valid := upRecParser.io.data.valid
     upRecFifo(0).io.enq.bits  := 
-      Mux( upSubMsgInfo(0).devIndex === localDevIndex & (upSubMsgInfo(0).operator === 2.U | upSubMsgInfo(0).operator === 3.U),
+      Mux( upSubMsgInfo(0).devIndex === localDevIndex & (upSubMsgInfo(0).operator === 0.U | upSubMsgInfo(0).operator === 2.U),
         upStreamData, upRecParser.io.data.bits)
     upRecParser.io.data.ready := upRecFifo(0).io.enq.ready
 
@@ -502,7 +502,7 @@ trait SlaveParserRW{ this: SlaveParserBase =>
 
     upRecFifo(1).io.enq.valid := upRecParser.io.data.valid
     upRecFifo(1).io.enq.bits  :=
-      Mux( upSubMsgInfo(1).devIndex === localDevIndex & (upSubMsgInfo(1).operator === 2.U | upSubMsgInfo(1).operator === 3.U),
+      Mux( upSubMsgInfo(1).devIndex === localDevIndex & (upSubMsgInfo(1).operator === 0.U | upSubMsgInfo(1).operator === 2.U),
         upStreamData, upRecParser.io.data.bits)
     upRecParser.io.data.ready := upRecFifo(1).io.enq.ready
 
@@ -672,8 +672,10 @@ trait SlaveParserProbe{ this: SlaveParserBase =>
   io.upOut   <> Queue( upSendGen.io.send, 1, true, true )
   io.downIn  <> downRecParser.io.rec
 
+  val tmpFifo = Queue( downSendGen.io.send, 1, true, true )
   when( isLastDevice & ~isReadyToProbe ){    //最后一个设备且不是探测模式
-    upRecParser.io.rec <> Queue( downSendGen.io.send, 1, true, true )   //axis短接
+    
+    upRecParser.io.rec <> tmpFifo   //axis短接
 
     io.downOut.valid := false.B                //对外下级io开路
     io.downOut.bits := 0.U.asTypeOf(new AXIS_Bundle(8))
@@ -681,7 +683,7 @@ trait SlaveParserProbe{ this: SlaveParserBase =>
 
   } .otherwise{
 
-    io.downOut <> Queue( downSendGen.io.send, 1, true, true )
+    io.downOut <> tmpFifo
     io.upIn    <> upRecParser.io.rec
 
   }

tb/shinTest/ShinTopTb.v

@@ -335,7 +335,7 @@ ShinTop s_ShinTop_slv3(
   .io_downIn_bits_tdata (io_down_bits_tdata[31:24]),
   .io_downIn_bits_tlast (io_down_bits_tlast[3]),
   .io_downIn_bits_tuser (io_down_bits_tuser[3]),
-  .io_downOut_ready     (1'b0),
+  .io_downOut_ready     (1'b1),
   .io_downOut_valid     (),
   .io_downOut_bits_tdata(),
   .io_downOut_bits_tlast(),
@@ -488,6 +488,7 @@ initial begin
   //嗅探
   #1000
 
+  begin
     dataBuf[0] = 8'h00;
     dataBuf[1] = 8'h01;//heeader length 0 嗅探包1
     dataBuf[2] = 8'h00;
@@ -524,7 +525,7 @@ initial begin
     @(posedge clock) #3
     req_valid = 1'b0;
 
-
+  end
 
 
 
@@ -535,6 +536,8 @@ initial begin
   // 顺序索引
   #10000
 
+  begin
+
     dataBuf[0] = 8'h00;
     dataBuf[1] = 8'ha0;//heeader length 10
     dataBuf[2] = 8'h00;
@@ -556,12 +559,12 @@ initial begin
 
 
 
-  for( integer i = 0; i < 14; i = i + 1 ) begin
+    for( integer i = 0; i < 14; i = i + 1 ) begin
-    @(posedge clock) #3
+      @(posedge clock) #3
-    sram_w_0_enw = 1'b1;
+      sram_w_0_enw = 1'b1;
-    sram_w_0_addrw = i;
+      sram_w_0_addrw = i;
-    sram_w_0_dataw = dataBuf[i];
+      sram_w_0_dataw = dataBuf[i];
-  end
+    end
 
     @(posedge clock) #3
     sram_w_0_enw = 1'b0;
@@ -581,283 +584,180 @@ initial begin
 
     @(posedge clock) #3
     req_valid = 1'b0;
+
+  end
+
+
+  //读写
+  #10000 
+  begin
+
+    dataBuf[0] = 8'h20;
+    dataBuf[1] = 8'h00;//heeader length 512
+    dataBuf[2] = 8'h00;
+    dataBuf[3] = 8'h00;
+
+    //子报文
+    dataBuf[4] = 8'h0; 
+    dataBuf[5] = 8'h8; //index = 2
+
+    dataBuf[6] = 8'h08; //地址 //SM0
+    dataBuf[7] = 8'h30; //地址 //偏置
+
+    dataBuf[8] = 8'h20; //命令2 长度56
+    dataBuf[9] = 8'd56; //长度
+    dataBuf[10] = $random;
+    dataBuf[11] = $random;
+
+    for( integer j = 0; j < 64-8; j = j + 1 ) begin
+      @(posedge clock) #3 
+      dataBuf[12+j] = $random;
+    end
+
+    //-------------------------
+
+    //子报文
+    dataBuf[68] = 8'h0; 
+    dataBuf[69] = 8'h4; //index = 1
+
+    dataBuf[70] = 8'h08; //地址 //SM0
+    dataBuf[71] = 8'h40; //地址 //偏置
+
+    dataBuf[72] = 8'h10; //命令1 长度56
+    dataBuf[73] = 8'd56; //长度
+    dataBuf[74] = $random;
+    dataBuf[75] = $random;
+
+    for( integer j = 0; j < 64-8; j = j + 1 ) begin
+      @(posedge clock) #3 
+      dataBuf[76+j] = $random;
+    end
+
+    //-------------------------
+
+    //子报文
+    dataBuf[132] = 8'h0; 
+    dataBuf[133] = 8'hc; //index = 3
+
+    dataBuf[134] = 8'h09; //地址 //SM1
+    dataBuf[135] = 8'h40; //地址 //偏置
+
+    dataBuf[136] = 8'h00; //命令0 长度56
+    dataBuf[137] = 8'd56; //长度
+    dataBuf[138] = $random;
+    dataBuf[139] = $random;
+
+    for( integer j = 0; j < 64-8; j = j + 1 ) begin
+      @(posedge clock) #3 
+      dataBuf[140+j] = $random;
+    end
+
+    //-------------------------
+
+    for( integer i = 0 ; i < 5; i = i + 1) begin
+      //子报文
+      dataBuf[196+i*64+0] = $random;
+      dataBuf[196+i*64+1] = 8'h0; //index = random
+
+      dataBuf[196+i*64+2] = $random;
+      dataBuf[196+i*64+3] = $random;
+
+      dataBuf[196+i*64+4] = 8'h00; //命令0 长度56
+      dataBuf[196+i*64+5] = 8'd56; //长度
+      dataBuf[196+i*64+6] = $random;
+      dataBuf[196+i*64+7] = $random;
+
+      for( integer j = 0; j < 64-8; j = j + 1 ) begin
+        @(posedge clock) #3 
+        dataBuf[196+i*64+8+j] = $random;
+      end
+    end
+
+    for( integer i = 0; i < 512; i = i + 1 ) begin
+      @(posedge clock) #3
+      sram_w_0_enw = 1'b1;
+      sram_w_0_addrw = i;
+      sram_w_0_dataw = dataBuf[i];
+    end
+
+    @(posedge clock) #3
+    sram_w_0_enw = 1'b0;
+    sram_w_0_addrw = 15'h0;
+    sram_w_0_dataw = 8'h0;
+
+    @(posedge clock) #3
+    txCmf = 1'b1;
+    @(posedge clock) #3
+    txCmf = 1'b0;
+
+    @(posedge clock) #3
+    req_valid = 1'b1;
+    req_bits_txAddr = 0;
+    req_bits_rxAddr = 0;
+    req_bits_length = 512;
+
+    @(posedge clock) #3
+    req_valid = 1'b0;
+  end
+
+
+
+  // 同步
+  // #10000
+
+  // begin
+
+  //   dataBuf[0] = 8'h00;
+  //   dataBuf[1] = 8'ha0;//heeader length 10
+  //   dataBuf[2] = 8'h00;
+  //   dataBuf[3] = 8'h00;
+
+  //   //子报文
+  //   //设置顺序地址
+  //   dataBuf[4] = 8'h0; //设备索引
+  //   dataBuf[5] = 8'h0; //设备索引、类型
+  //   dataBuf[6] = $random; //地址
+  //   dataBuf[7] = $random; //地址
+  //   dataBuf[8] = 8'hd0;   //命令d 负载长度2
+  //   dataBuf[9] = 8'd02;   //负载长度2
+  //   dataBuf[10] = 8'h0;   //工作计数0
+  //   dataBuf[11] = 8'h0;   //工作计数0
+
+  //   dataBuf[12] = 8'h0;   //负载
+  //   dataBuf[13] = 8'h0;   //负载
+
+
+
+  //   for( integer i = 0; i < 14; i = i + 1 ) begin
+  //     @(posedge clock) #3
+  //     sram_w_0_enw = 1'b1;
+  //     sram_w_0_addrw = i;
+  //     sram_w_0_dataw = dataBuf[i];
+  //   end
+
+  //   @(posedge clock) #3
+  //   sram_w_0_enw = 1'b0;
+  //   sram_w_0_addrw = 15'h0;
+  //   sram_w_0_dataw = 8'h0;
+
+  //   @(posedge clock) #3
+  //   txCmf = 1'b1;
+  //   @(posedge clock) #3
+  //   txCmf = 1'b0;
+
+  //   @(posedge clock) #3
+  //   req_valid = 1'b1;
+  //   req_bits_txAddr = 0;
+  //   req_bits_rxAddr = 0;
+  //   req_bits_length = 14;
+
+  //   @(posedge clock) #3
+  //   req_valid = 1'b0;
+
+  // end
+
+
 end
-// always @(posedge clock) begin
-  
-// end
-
-
-// initial begin
-//   #1000
-
-//   s_ShinTop.slaveParser.localDevIndex = 3; //强制设备索引为3，测试子报文操作
-
-//   //主帧头
-//   @(posedge clock) #3 
-//   io_downIn_valid = 1;
-//   io_downIn_bits_tdata = 8'h20;
-
-//   @( io_downIn_valid & io_downIn_ready)
-
-//   @(posedge clock) #3 
-//   io_downIn_valid = 1;
-//   io_downIn_bits_tdata = 8'h00; //heeader length 512
-
-//   @(posedge clock) #3 
-//   io_downIn_valid = 1;
-//   io_downIn_bits_tdata = 8'h00;
-
-//   @(posedge clock) #3 
-//   io_downIn_valid = 1;
-//   io_downIn_bits_tdata = 8'h00;
-
-
-//   //子报文
-//   for( integer i = 0; i < 8; i = i + 1 ) begin
-//     if( i != 5 ) begin
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = $random; 
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = $random;
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = $random;
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = $random;
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = 8'h0;
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = 8'd56;
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = $random;
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = $random;
-
-//       for( integer j = 0; j < 64-8; j = j+ 1 ) begin
-//         @(posedge clock) #3 
-//         io_downIn_valid = 1;
-//         io_downIn_bits_tdata = 8'ha5; //heeader length 512
-//       end
-//     end else begin //第5个子报文操作
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = 8'h0; 
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = 8'hC; //3号设备 类型空
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = 8'h08; //地址 //SM0
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = 8'h30; //地址 //偏置
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = 8'h30; //命令3 长度56
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = 8'd56; //长度56
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = $random; //工作计数
-
-//       @(posedge clock) #3 
-//       io_downIn_valid = 1;
-//       io_downIn_bits_tdata = $random; //工作计数
-
-//       for( integer j = 0; j < 64-8; j = j+ 1 ) begin
-//         @(posedge clock) #3 
-//         io_downIn_valid = 1;
-//         io_downIn_bits_tdata = 8'h55; //heeader length 512
-//       end
-//     end
-//   end
-
-//   @(posedge clock) #3 
-//   io_downIn_valid = 1;
-//   io_downIn_bits_tdata = $random;
-//   io_downIn_bits_tlast = 0;
-//   io_downIn_bits_tuser = 0;
-
-//   @(posedge clock) #3 
-//   io_downIn_valid = 1;
-//   io_downIn_bits_tdata = $random;
-//   io_downIn_bits_tlast = 0;
-//   io_downIn_bits_tuser = 0;
-
-//   @(posedge clock) #3 
-//   io_downIn_valid = 1;
-//   io_downIn_bits_tdata = $random;
-//   io_downIn_bits_tlast = 0;
-//   io_downIn_bits_tuser = 0;
-
-//   @(posedge clock) #3 
-//   io_downIn_valid = 1;
-//   io_downIn_bits_tdata = $random;
-//   io_downIn_bits_tlast = 1;
-//   io_downIn_bits_tuser = 0;
-
-//   @(posedge clock) #3 
-//   io_downIn_valid = 0;
-//   io_downIn_bits_tlast = 0;
-
-
-
-
-//   #1000
-//   #1000
-//   #1000
-//   #1000
-
-//   @(posedge clock) #3 
-//   io_upIn_valid = 1;
-//   io_upIn_bits_tdata = 8'h20;
-
-//   @( io_upIn_valid & io_upIn_ready)
-
-//   @(posedge clock) #3 
-//   io_upIn_valid = 1;
-//   io_upIn_bits_tdata = 8'h00; //heeader length 512
-
-//   @(posedge clock) #3 
-//   io_upIn_valid = 1;
-//   io_upIn_bits_tdata = 8'h00; //heeader frameInfo
-
-//   @(posedge clock) #3 
-//   io_upIn_valid = 1;
-//   io_upIn_bits_tdata = 8'h00; //heeader frameInfo
-
-//   for( integer i = 0; i < 8; i = i + 1 ) begin
-//     if( i != 5 ) begin
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = $random; 
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = $random;
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = $random;
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = $random;
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = 8'h0;
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = 8'd56;
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = $random;
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = $random;
-
-//       for( integer j = 0; j < 64-8; j = j+ 1 ) begin
-//         @(posedge clock) #3 
-//         io_upIn_valid = 1;
-//         io_upIn_bits_tdata = 8'ha5; //heeader length 512
-//       end
-//     end else begin //第5个子报文操作
-//       // io_sram_r_datar = 8'hec;
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = 8'h0; 
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = 8'hC; //3号设备 类型空
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = 8'h10; //地址SM1
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = 8'h10; //地址偏置
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = 8'h30; //命令3 长度56
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = 8'd56; //长度56
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = $random; //工作计数
-
-//       @(posedge clock) #3 
-//       io_upIn_valid = 1;
-//       io_upIn_bits_tdata = $random; //工作计数
-
-//       for( integer j = 0; j < 64-8; j = j+ 1 ) begin
-//         @(posedge clock) #3 
-//         io_upIn_valid = 1;
-//         io_upIn_bits_tdata = 8'h55; //heeader length 512
-//       end
-//     end
-//   end
-
-//   @(posedge clock) #3 
-//   io_upIn_valid = 1;
-//   io_upIn_bits_tdata = $random;
-//   io_upIn_bits_tlast = 0;
-//   io_upIn_bits_tuser = 0;
-
-//   @(posedge clock) #3 
-//   io_upIn_valid = 1;
-//   io_upIn_bits_tdata = $random;
-//   io_upIn_bits_tlast = 0;
-//   io_upIn_bits_tuser = 0;
-
-//   @(posedge clock) #3 
-//   io_upIn_valid = 1;
-//   io_upIn_bits_tdata = $random;
-//   io_upIn_bits_tlast = 0;
-//   io_upIn_bits_tuser = 0;
-
-//   @(posedge clock) #3 
-//   io_upIn_valid = 1;
-//   io_upIn_bits_tdata = $random;
-//   io_upIn_bits_tlast = 1;
-//   io_upIn_bits_tuser = 0;
-
-//   @(posedge clock) #3 
-//   io_upIn_valid = 0;
-//   io_upIn_bits_tlast = 0;
-// end
-
-
 
 
 endmodule