parameter, switch of diff slv bus
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@@ -6,19 +6,27 @@ import freechips.rocketchip.diplomacy._
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import org.chipsalliance.cde.config._
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abstract class MacModule(implicit val p: Parameters) extends Module with HasMacParameters { def io: Record }
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abstract class MacBundle(implicit val p: Parameters) extends Bundle with HasMacParameters
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case object MacParamsKey extends Field[MacSetting]
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case class MacSetting(){
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case class MacSetting(
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isTileLink: Boolean = false
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){
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}
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trait HasMacParameters {
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implicit val p: Parameters
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val riftSetting = p(MacParamsKey)
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val macSetting = p(MacParamsKey)
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def isTileLink = macSetting.isTileLink
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}
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class MacCfg extends Config((_, _, _) => {
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case MacParamsKey => MacSetting()
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})
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})
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