2025-01-15 11:23:02 +08:00
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#ifndef _TL2CDR_H_
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#define _TL2CDR_H_
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2025-02-02 20:19:19 +08:00
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#ifndef __ASSEMBLER__
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2025-01-15 11:23:02 +08:00
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#include <stdint.h>
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2025-02-02 20:19:19 +08:00
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#endif
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2025-01-15 11:23:02 +08:00
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2025-02-09 01:17:17 +08:00
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#define TL2CDR_BASE 0x10000000U
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#define CDR_INT_TX0END 14U
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#define CDR_INT_TX1END 15U
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#define CDR_INT_RX0ERROR 16U
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#define CDR_INT_RX1ERROR 17U
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#define CDR_INT_RX0START 18U
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#define CDR_INT_RX1START 19U
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#define CDR_INT_RX0END 20U
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#define CDR_INT_RX1END 21U
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2025-02-10 00:03:16 +08:00
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#define CDR_INT_TX0_FIFO_DEQ 22U
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2025-02-09 01:17:17 +08:00
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#define CDR_INT_TX1_FIFO_DEQ 23U
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#define CDR_INT_RX0_FIFO_ENQ 24U
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#define CDR_INT_RX1_FIFO_ENQ 25U
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#define TX0_WriteSoftReset 0x00U
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#define TX0_WriteTxLen 0x04U
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#define TX0_WriteTxFifo 0x08U
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#define TX0_ReadTxCrc 0x0CU
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#define TX1_WriteSoftReset 0x10U
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#define TX1_WriteTxLen 0x14U
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#define TX1_WriteTxFifo 0x18U
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#define TX1_ReadTxCrc 0x1CU
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#define RX0_WriteSoftReset 0x20U
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#define RX0_ReadRxLen 0x24U
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#define RX0_ReadRxFifo 0x28U
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#define RX0_ReadRxCrc 0x2CU
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#define RX0_WrtieLimitTimerAim 0x30U
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#define RX0_WriteLimitTxPair 0x34U
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#define RX1_WriteSoftReset 0x40U
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#define RX1_ReadRxLen 0x44U
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#define RX1_ReadRxFifo 0x48U
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#define RX1_ReadRxCrc 0x4CU
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#define RX1_WrtieLimitTimerAim 0x50U
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#define RX1_WriteLimitTxPair 0x54U
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#define HLM_ReadStatus 0x58U
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#define HLM_ReadIsLast 0x5CU
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2025-01-27 22:25:39 +08:00
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2025-02-02 20:19:19 +08:00
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#ifndef __ASSEMBLER__
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2025-02-09 01:17:17 +08:00
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extern volatile uint32_t * const tx0_softReset;
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extern volatile uint32_t * const tx0_txLen;
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extern volatile uint32_t * const tx0_txFifo;
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extern volatile uint32_t * const tx0_txCrc;
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extern volatile uint32_t * const tx1_softReset;
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extern volatile uint32_t * const tx1_txLen;
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extern volatile uint32_t * const tx1_txFifo;
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extern volatile uint32_t * const tx1_txCrc;
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extern volatile uint32_t * const rx0_softReset;
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extern volatile uint32_t * const rx0_rxLen;
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extern volatile uint32_t * const rx0_rxFifo;
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extern volatile uint32_t * const rx0_rxCrc;
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extern volatile uint32_t * const rx0_rxTimerAim;
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extern volatile uint32_t * const rx0_rxTxPair;
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extern volatile uint32_t * const rx1_softReset;
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extern volatile uint32_t * const rx1_rxLen;
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extern volatile uint32_t * const rx1_rxFifo;
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extern volatile uint32_t * const rx1_rxCrc;
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extern volatile uint32_t * const rx1_rxTimerAim;
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extern volatile uint32_t * const rx1_rxTxPair;
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extern volatile uint32_t * const HLM_status;
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extern volatile uint32_t * const HLM_isLast;
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2025-02-02 20:19:19 +08:00
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#endif
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2025-01-15 11:23:02 +08:00
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#endif
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